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ltm8001 1 8001f for more information www.linear.com/8001 typical application features description 36v in , 5a module regulator with 5-output configurable ldo array the lt m ? 8001 is a 36v in , 5a step-down module ? regu- lator with a 5-output configurable ldo array. operating over an input voltage range of 6v to 36v, the ltm8001 buck regulator supports an output voltage range of 1.2v to 24v. following the buck regulator is an array of five 1.1a linear regulators whose outputs may be connected in parallel to accommodate a wide variety of load combi - nations. three of these ldos are tied to the output of the buck regulator, while the other two are tied together to an undedicated input. the low profile package (3.42mm) enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the ltm8001 is packaged in a thermally enhanced, compact (15mm 15mm) and low profile (3.42mm) overmolded ball grid array (bga) pack - age suitable for automated assembly by standard surface mount equipment. the ltm8001 is rohs compliant. applications n complete step-down switch mode power supply with configurable array of five ldos n step-down switching power supply C adjustable 10% accurate output current limit Cconstant-current, constant-voltage operation C wide input voltage range: 6v to 36v C 1.2v to 24v output voltage n configurable output ldo array C five 1.1a parallelable outputs C outputs adjustable from 0v to 24v C low output noise: 90v rms (10hz to 1mhz) n 15mm 15mm 3.42mm surface mount bga package n fpga, dsp, asic and microprocessor supplies n servers and storage devices n rf transceivers l , lt, ltc, ltm, module, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7199560, 7321203. 5a output dc/dc module converter 118k 350khz v out5 set5 ldo 5 fbo step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 19.6k rt gnd 10f v in45 510k 3.3v v out2 set2 ldo 2 v out1 set1 1.2v 1a 1.1v 1.5a 0.9v 1.5a 1.8v 1a v in0 run v in 6v to 36v v out0 ltm8001 ldo 1 45.3k 4.7f 4.7f 2.2f 54.9k 121k 470f 8001 ta01 100f +
ltm8001 2 8001f for more information www.linear.com/8001 absolute maximum ratings v in0 ........................................................................... 40v v in45 , bias45 ........................................................... 25v bias123 .................................................................... 25v fb0, rt, comp, ilim, v ref ......................................... 3v v out0-5 ..................................................................... 25v run, sync, ss ........................................................... 6v set1-5 (relative to v out1-5 , respectively) ............ 0.3v current into set1-5 ............................................. 10ma current into run pin ............................................ 100a maximum junction temperature (notes 2, 3) ....... 125c peak body reflow temperature ............................ 245c storage temperature .............................. C55c to 125c (note 1) order information pin configuration 11 10 9 8 7 6 5 4 3 2 1 a b c d e f bga package 121 pads (15mm 15mm 3.42mm) g h j k ss run fbo comp sync v ref ilim rt set1 v in0 bank 1 l v out1 v out2 v out3 top view v out4 v out5 set2set3 set4 gnd bank 2 set5 bias45 v out0 bank 4 bias123 v in45 bank 3 t jmax = 125c, v ja = 16.1c/w, v jcbottom = 5.99c/w, v jctop = 13.4c/w, v jb = 4.98c/w v values determined per jedec 51-9, 51-12 weight = 1.8 grams lead free finish tray part marking* package description temperature range (note 3) ltm8001ey#pbf ltm8001ey#pbf ltm8001y 121-lead (15mm w 15mm w 3.42mm) bga C40c to 125c ltm8001iy#pbf ltm8001iy#pbf ltm8001y 121-lead (15mm w 15mm w 3.42mm) bga C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/
ltm8001 3 8001f for more information www.linear.com/8001 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. run = 3v unless otherwise noted (note 3). parameter conditions min typ max units buck regulator minimum v in0 input voltage l 6 v v out0 output dc voltage 0a < i out 3a, r fb0 open 0a < i out 3a; r fb0 = 536 1.2 24 v v v out0 output dc current 6v < v in0 < 36v, v out = 3.3v 0 5 a quiescent current into v in0 run = 0v no load 0.1 26 1 40 a ma v out0 line regulation 6v < v in0 < 36v, i out = 4.5a 0.5 % v out0 load regulation v in0 = 24v, 0a < i out < 4.5a 1.2 % v out0 rms voltage ripple v in0 = 24v, i out = 4.5a 10 mv switching frequency r t = 39.2k r t = 200k 1000 200 khz khz voltage at fb0 pin l 1.15 1.19 1.21 v internal fbo resistor 10 k run pin current run = 1.45v 5.5 a run threshold voltage (falling) 1.49 1.61 v run threshold voltage (rising) 1.63 1.75 v ilim control range 0 1.5 v ilim pin current 100 na ilim current limit accuracy ilim = 1.5v ilim = 0.75v 5.1 2.5 6.4 3.4 a a v ref voltage 0.5ma load 1.9 2 2.1 v ss pin current 11 a sync input low threshold f sync = 500khz 0.8 v sync input high threshold f sync = 500khz 1.2 v sync input current sync = 0v sync = 2v C0.1 0.1 a a ldo array set1-5 pin current bias123 = bias45 = 2v, setx = 0v, i out1-5 = 1ma l 9.85 9.80 10 10 10.15 10.20 a a v outx C setx offset voltage bias123 = bias45 = 2v, setx = 0v, i out1-5 = 1ma l C4 C6.5 4 6 mv mv line regulation for set current 1v < v out0 = v in45 < 22v, i outx = 1ma (note 4) l 11 na line regulation for v out1-5 1v < v out0 = v in45 < 22v, i outx = 1ma (note 4) 0.25 mv load regulation for setx current i out1-5 = 1ma to 1.1a 1 na load regulation for v out1-5 i out1-5 = 1ma to 1.1a l 34 52 mv mv minimum load current for v out1-5 (note 4) v out0 = v in45 = bias123 = bias45 = 10v v out0 = v in45 = bias123 = bias45 = 22v l l 500 1 a ma bias123, bias45 dropout voltage i out1-5 = 100ma i out1-5 = 1.1a l 1.2 1.6 v v v out0 to v out1-3 and v in45 to v out4-5 dropout voltage i out1-5 = 100ma i out1-5 = 1.1a l 100 500 mv mv
ltm8001 4 8001f for more information www.linear.com/8001 typical performance characteristics efficiency vs output current, v out0 = 2.5v efficiency vs output current, v out0 = 3.3v efficiency vs output current, v out0 = 5v (t a = 25c unless otherwise noted. configured per table 1, where applicable.) electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. run = 3v unless otherwise noted (note 3). parameter conditions min typ max units maximum v out0 to v out1-3 and v in45 to v out4-5 differential voltage (note 5) i out1-5 = 750ma i out1-5 = 310ma i out1-5 = 125ma 10 15 22 v v v bias123, bias45 pin current i out1-5 = 100ma i out1-5 = 1.1a l 6 30 ma ma v out1-5 current limit (note 5) v out1-5 = 0v 1.3 a v out1-5 rms output noise v out1-5 = 1v, i out1-5 = 1a, 100hz to 1mhz 90 v rms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: this module regulator includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 3: the ltm8001e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm8001i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 4: no minimum load is required if the respective linear regulator is off, such as when v out0 = 0v, v in45 = 0v, bias123 = 0v or bias45 = 0v. note 5: the current limit may decrease to zero at input-to-output differential voltages greater than 22v. operation at voltages for v out0 , v in45 , bias123 and bias45 is allowed up to a maximum of 36v as long as the difference between the linear regulator input and output voltage is below the specified differential voltage. line and load regulation specifications are not applicable when the device is in current limit. v out0 current (a) 0 80 85 90 4 8001 g01 75 70 1 2 3 5 65 60 55 efficiency (%) v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 80 85 95 90 4 8001 g02 75 70 1 2 3 5 65 60 efficiency (%) v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 90 95 100 4 8001 g03 85 80 1 2 3 5 75 70 65 efficiency (%) v ino = 12v v ino = 24v v ino = 36v
ltm8001 5 8001f for more information www.linear.com/8001 typical performance characteristics efficiency vs output current, v out0 = 8v efficiency vs output current, v out0 = 12v efficiency vs output current, v out0 = 18v efficiency vs output current, v out0 = 24v input current vs output current, v out0 = 2.5v input current vs output current, v out0 = 3.3v (t a = 25c unless otherwise noted. configured per table 1, where applicable.) input current vs output current, v out0 = 5v input current vs output current, v out0 = 8v input current vs output current, v out0 = 12v v out0 current (a) 0 90 95 100 4 8001 g04 85 80 1 2 3 5 75 70 efficiency (%) v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 90 95 100 4 8001 g05 85 80 1 2 3 5 75 70 efficiency (%) v ino = 24v v ino = 36v v out0 current (a) 0 efficiency (%) 90 95 100 4 8001 g06 85 80 75 1 2 3 5 v ino = 28v v ino = 36v v out0 current (a) 0 efficiency (%) 90 95 100 4 8001 g07 85 80 1 2 3 5 v ino = 28v v ino = 36v v out0 current (a) 0 input current (a) 0.9 1.2 1.5 4 8001 g08 0.6 0.3 0 1 2 3 5 v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 0 input current (a) 0.2 0.6 0.8 1.0 2 4 5 1.8 8001 g09 0.4 1 3 1.2 1.4 1.6 v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 input current (a) 1.5 2.0 2.5 4 8001 g10 1.0 0.5 0 1 2 3 5 v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 input current (a) 1.5 2.0 2.5 3 5 8001 g11 1.0 0.5 0 1 2 4 3.0 3.5 4.0 v ino = 12v v ino = 24v v ino = 36v v out0 current (a) 0 2.0 2.5 3.0 4 8001 g12 1.5 1.0 1 2 3 5 0.5 0 input current (a) v ino = 24v v ino = 36v
ltm8001 6 8001f for more information www.linear.com/8001 typical performance characteristics input current vs output current, v out0 = 18v input current vs output current, v out0 = 24v minimum v in0 vs output current, v out0 = 3.3v and below minimum v in0 vs output current, v out0 = 5v minimum v in0 vs output current, v out0 = 8v minimum v in0 vs output current, v out0 = 12v (t a = 25c unless otherwise noted. configured per table 1, where applicable.) minimum v in0 vs output current, v out0 = 18v minimum v in0 vs output current, v out0 = 24v output voltage vs output current, v out0 = 2.5v v out0 current (a) 0 input current (a) 1.5 2.0 2.5 3 5 8001 g13 1.0 0.5 0 1 2 4 3.0 3.5 4.0 v ino = 28v v ino = 36v v out0 current (a) 0 input current (a) 3.0 4.0 5.0 4 8001 g14 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 1 2 3 5 v ino = 28v v ino = 36v v out0 current (a) 0 6 7 4 8001 g1 5 1 2 3 5 4 minimum v in0 voltage (v) v out0 current (a) 0 6.75 6.80 4 8001 g16 6.70 1 2 3 5 6.65 minimum v in0 voltage (v) v out0 current (a) 0 9.80 9.85 4 8001 g17 9.75 1 2 3 5 9.70 minimum v in0 voltage (v) v out0 current (a) 0 13.85 13.90 13.95 4 8001 g18 13.80 13.75 1 2 3 5 13.70 13.65 minimum v in0 voltage (v) v out0 current (a) 0 19.69 19.70 19.71 4 8001 g19 19.68 19.67 1 2 3 5 19.66 19.65 19.64 minimum v in0 voltage (v) v out0 current (a) 0 minimum v in0 voltage (v) 25.70 26.00 26.05 26.10 2 4 8001 g20 25.60 25.90 25.80 25.65 25.95 25.55 25.85 25.75 1 3 5 load current (a) ?10 2.0 2.5 3.5 5 8001 g21 1.5 1.0 ?5 0 10 0.5 0 3.0 output voltage (v)
ltm8001 7 8001f for more information www.linear.com/8001 typical performance characteristics ilim voltage vs maximum i out0 output current v in0 input current vs voltage, v out0 shorted temperature rise vs v out0 current, buck regulator, v out0 = 3.3v temperature rise vs v out0 current, buck regulator, v out0 = 5v temperature rise vs v out0 current, buck regulator, v out0 = 2.5v temperature rise vs v out0 current, buck regulator, v out0 = 8v (t a = 25c unless otherwise noted. configured per table 1, where applicable.) temperature rise vs v out0 current, buck regulator, v out0 = 12v temperature rise vs v out0 current, buck regulator, v out0 = 18v temperature rise vs v out0 current, buck regulator, v out0 = 24v ilim voltage (v) 0 6 4 2 0 ?2 ?4 ?6 ?8 0.75 1.25 8001 g22 0.25 0.5 1 1.5 maximum current (a) v in0 voltage (v) 0 0 v in0 input current (ma) 100 200 300 400 600 6 12 18 24 8001 g23 30 36 500 v out0 current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8001 g24 5 12v in 24v in 36v in v out0 current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8001 g25 5 12v in 24v in 36v in v out0 current (a) 0 50 60 70 4 8001 g26 40 30 1 2 3 5 20 10 0 temperature rise (c) 12v in 24v in 36v in v out0 current (a) 0 temperature rise (c) 30 40 50 3 5 8001 g27 20 10 0 1 2 4 60 70 80 12v in 24v in 36v in v out0 current (a) 0 temperature rise (c) 60 80 100 4 8001 g28 40 20 50 70 90 30 10 0 1 2 3 5 24v in 36v in v out0 current (a) 0 0 temperature rise (c) 20 40 60 80 100 120 1 2 3 4 8001 g29 5 28v in 36v in v out0 current (a) 0 temperature rise (c) 60 80 100 4 8001 g30 40 20 50 70 90 30 10 0 1 2 3 5 36v in
ltm8001 8 8001f for more information www.linear.com/8001 typical performance characteristics ldo input-to-output dropout voltage vs output current ldo v bias -to-output dropout voltage vs output current ldo current limit vs input-to- output differential voltage ldo temperature rise vs ldo output current (v in = 24v, v out0 = 12v, 1 ldo powered) ldo temperature rise vs ldo output current (v in = 24v, v out0 = 12v, 5 ldos in parallel) (t a = 25c unless otherwise noted. configured per table 1, where applicable.) ldo input voltage ripple rejection (v out4 = 2.5v, v in45 = v bias45 = 4.5v) ldo input voltage ripple rejection (v out4 = 2.5v, v bias45 = 4.5v, v in45 = 3.5v) output current (ma) 0 input-to-output dropout voltage (mv) 150 200 250 600 1000 8001 g31 100 50 0 200 400 800 300 350 400 output current (ma) 0 bias-to-output dropout voltage (v) 1.40 1.42 1.44 600 1000 8001 g32 1.38 1.36 1.34 200 400 800 1.46 1.48 1.52 1.50 input-to-output differential (v) 0 ldo current limit (ma) 800 1000 1200 40 8001 g33 600 400 0 10 20 30 200 1600 1400 ldo output current (ma) 0 0 temperature rise (c) 20 40 60 80 120 500 1000 8001 g34 1500 ldo input-to-output differential voltage 100 0.5v 1.6v 2.4v 4v 7v 9.5v 11.9v total ldo output current (a) 0 0 temperature rise (c) 20 40 60 80 120 1 2 3 4 8001 g35 5 ldo input-to-output differential voltage 100 0.5v 0.9v 2v 4v 7v 8.7v 11.9v frequency (hz) 10 ripple rejection (db) 60 80 100 8001 g36 40 20 50 70 90 30 10 0 10 2 10 3 10 4 10 5 10 6 i load = 100ma i load = 1.1a frequency (hz) 10 ripple rejection (db) 60 80 100 8001 g37 40 20 50 70 90 30 10 0 10 2 10 3 10 4 10 5 10 6 i load = 100ma i load = 1.1a
ltm8001 9 8001f for more information www.linear.com/8001 pin functions v in0 (bank 1): the v in0 bank supplies current to the ltm8001s internal regulator and to the internal power switches. this pin must be locally bypassed with an ex - ternal, low esr capacitor; see table 1 for recommended values. gnd (bank 2): tie these gnd pins to a local ground plane below the ltm8001 and the circuit components. in most applications, the bulk of the heat flow out of the ltm8001 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the feedback divider (r fb0 ) to this net. v in45 (bank 3): input to the ldos connected to v out4 and v out5 . it must be locally bypassed with a low esr capacitor. v out0 (bank 4): switching power converter output pins. apply the output filter capacitor and the output load between these pins and the gnd pins. in most cases, an output capacitance made up of a combination of ceramic and elec - trolytic capacitors yields the optimal volumetric solution. bias45 (pin a8): this pin is the supply pin for the control circuitry of the ldos connected to v out4 and v out5 . for the ldos to regulate, this voltage must be more than 1.2v to 1.6v greater than the output voltage (see dropout specifications). bias123 (pin b8): this pin is the supply pin for the control circuitry of the ldos connected to v out1 -v out3 . for the ldos to regulate, this voltage must be more than 1.2v to 1.6v greater than the output voltage (see dropout specifications). ss (pin k4): the soft-start pin. place an external capacitor to ground to limit the regulated current during start-up conditions. the soft-start pin has an 11a charging current. sync (pin k7): frequency synchronization pin. this pin allows the switching frequency to be synchronized to an external clock. the r t resistor should be chosen to operate the internal clock at 20% slower than the sync pulse frequency. this pin should be grounded when not in use. do not leave this pin floating. when laying out the board, avoid noise coupling to or from the sync trace. see the switching frequency synchronization section in applications information. v ref (pin k8): buffered 2v reference capable of 0.5ma drive. run (pin l4): the run pin acts as an enable pin and turns on the internal circuitry. the pin does not have any pull up or pull down, requiring a voltage bias for normal part operation. the run pin is internally clamped, so it may be pulled up to a voltage source that is higher than typical performance characteristics (t a = 25c unless otherwise noted. configured per table 1, where applicable.) ldo v bias ripple rejection (v out4 = 2.5v, v bias45 = 4.5v, v in45 = 3.5v) ldo output ripple frequency (hz) 10 ripple rejection (db) 60 80 100 8001 g38 40 20 50 70 90 30 10 0 10 2 10 3 10 4 10 5 10 6 i load = 100ma i load = 1.1a 2s/div v out = 1.2v at 700ma c out1 = 22f c set1 = 1nf v in = 12v v out0 = 1.8v loaded to a total current of 5a 100mhz bw 8001 g39 1mv/div
ltm8001 10 8001f for more information www.linear.com/8001 block diagram current mode controller 2.2h 10k 0.2f 2.2f v in0 run comp ilim v ref sync ss r sense v out0 v out1 set1 internal regulator v in0 gnd rt fb0 bias123 bias45 v in45 1.1a ldo v out2 set2 1.1a ldo v out3 set3 1.1a ldo v out4 set4 1.1a ldo v out5 set5 8001 bd 1.1a ldo the absolute maximum voltage rating of 6v through a resistor, provided the pin current does not exceed 100a. fb0 (pin l5): the ltm8001 regulates its fb0 pin to 1.19v. connect the adjust resistor from this pin to ground. the value of r fb0 is given by the equation: r fbo = 11.9 v out ? 1.19 where r fb0 is in k. comp (pin l6): compensation pin. this pin is generally not used. the ltm8001 is internally compensated, but some rare situations may arise that require a modifica - tion to the control loop. this pin connects directly to the input pwm comparator of the ltm8001. in most cases, no adjustment is necessary. if this function is not used, leave this pin open. rt (pin l7): the rt pin is used to program the switch - ing frequency of the ltm8001 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the recommended resistance value and switching frequency. when using the sync function, set the frequency to be 20% lower than the sync pulse frequency. do not leave this pin open. ilim (pin l8): the ilim pin reduces the maximum regulated output current of the ltm8001. the maximum control volt - age range is 1.5v. ilim voltages above 1.5v have little or no effect. if this function is not used, tie this pin to v ref . set1, set2, set3, set4, set5 (pins l9, h11, g11, d11, a9): these pins set the regulation point for each ldo. a fixed current of 10a flows out of this pin through a single external resistor, which programs the output voltage of the device. output voltage range is zero to the absolute maximum rated output voltage. the transient performance can be improved by adding a small capacitor from the set pin to ground. v out1 (pins l10, l11), v out2 (pins j11, k11), v out3 (pins e11, f11), v out4 (pins b11, c11), v out5 (pins a10, a11): these are the power outputs of the individual ldos. there must be a minimum load current of 1ma or the output may not regulate. the internal ldos are rated for positive volt - ages between their inputs and outputs. avoid applications where the internal ldos can experience a negative voltage, even during start-up and turn-off transients pin functions
ltm8001 11 8001f for more information www.linear.com/8001 operation the ltm8001 consists of two major parts: the first is a standalone nonisolated step-down switching dc/dc power converter that can deliver up to 5a of output current. the second part is an array of five parallelable 1.1a ldos. the dc/dc converter provides a precisely regulated output voltage programmable via one external resistor from 1.2v to 24v. the input voltage range is 6v to 36v. given that it is a step-down converter, make sure that the input volt - age is high enough to support the desired output voltage and load current. the linear regulator array consists of five low drop-out regulators, of which three inputs are dedicated to the buck converters output (v out0 ) and two tie to an undedicated input (v in45 ). each individual linear regulator may be set to a unique voltage through its set pin, or may be paralleled with other ldos by tying their respective set and v out pins together. the ltm8001 step-down switching converter utilizes fixed frequency, average current mode control to accurately regulate the output current. this results in a constant- voltage, constant-current output characteristic, making the ltm8001s step-down regulator well suited for many supercapacitor and battery charging applications. as shown in the typical performance characteristics, the current limit works in both directions. the control loop will regulate the current in the internal inductor. once the v out0 output has reached the regulation voltage determined by the resistor from the fbo pin to ground, the voltage regulation loop will reduce the output current and maintain the output voltage. the ilim input may be used to set the maximum allowable current output of the ltm8001. the analog control range of the ilim pin is from 0v to 1.5v. if the ilim pin is raised above 1.5v, there is little or no effect. the run pin functions as a precision enable for the step- down switching converter connected to v out0 . as the v out1-3 ldo inputs are tied to v out0 , the run pin will also implicitly enable or disable these ldos as well, unless some external power source is tied to v out0 . refer to the applications information section shorted input protection if v out0 is forced above v in0 . when the voltage at the run pin is lower than 1.55v, switching is terminated. below the turn-on threshold, the run pin sinks 5.5a. this current can be used with a resistor between run and v in0 to set hysteresis. please refer to the uvlo and shutdown section in the applications information for further details. during start-up, the ss pin is held low until the part is enabled, after which the capacitor at the soft-start pin is charged with an 11a current source. the ltm8001 is equipped with thermal shutdown circuitry to protect the device during momentary overload condi - tions. it is set above the 125c absolute maximum internal temperature rating to avoid interfering with normal speci - fied operation, so internal device temperatures will exceed the absolute maximum rating when the overtemperature protection is active. thus, continuous or repeated activa - tion of the thermal shutdown may impair device reliability. during thermal shutdown, all switching is terminated and the ss pin is driven low. the switching frequency is determined by a resistor at the rt pin. the ltm8001 may also be synchronized to an external clock through the use of the sync pin. please see the switching frequency synchronization section in the applications information for further details. the v out1-5 linear regulators are easy to use and have all the protection features expected in high performance regulators. included are short-circuit protection and safe operating area protection, as well as thermal shutdown. these linear regulators are especially well suited to ap - plications needing multiple rails. their architecture allows their outputs to be adjusted down to zero volts. the output voltage is set by a single resistor, handling modern low voltage digital ics as well as allowing easy parallel opera - tion and simplified thermal management. the linear regulators can be operated in two modes. one mode has the bias123 and bias45 pins connected to the linear regulator power input pins (v out0 and v in45 ) which gives a limitation of about 1.6v dropout. in the other mode, the bias123 and bias45 pins can be tied to a voltage at least 1.6v above their highest respective outputs. the linear regulator power input (v out0 and v out45 ) can then be set to a lower voltage that meets the dropout requirement, minimizing the power dissipation.
ltm8001 12 8001f for more information www.linear.com/8001 applications information for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and v out0 output voltage. 2. apply the recommended c in0 , c out0 , r fb0 and r t val- ues. note that ceramic and electrolytic capacitors are recommended. these are intended to work in concert to optimize performance and solution size; apply both capacitors. 3. apply the set resistors for the v out1 , v out2 , v out3 , v out4 and v out5 regulators. to set the voltage of each linear regulator, use the equation r setx = v outx 10a where the value of r set is in ohms. note that there is no minimum positive output voltage for the regulator, but a minimum load current is required to maintain regulation regardless of output voltage, (please see electrical characteristics table). for true zero voltage output operation, this minimum load current must be returned to a negative supply voltage. if paralleling the linear regulators, set the output of each regulator to the same voltage by tying the setx pins together and applying a single resistor. the value of the single set resistor is given by the equation: r set = v out 10a ? n where n is the number of regulators paralleled. 4. apply the output capacitors for the v out1 , v out2 , v out3 , v out4 and v out5 regulators. a minimum output capaci- tor of 2.2f with an esr of 0.5 or less is recommended to prevent oscillations. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction temperature, the rela - tionship between the input and output voltage magnitude and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the ltm8001 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency (and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the switching frequency synchronization section for details. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature, applied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application circuit they may have only a small fraction of their nominal capacitance result - ing in much higher output voltage ripple than expected. many of the output capacitances given in table 1 specify an electrolytic capacitor. ceramic capacitors may also be used in the application, but it may be necessary to use more of them. many high value ceramic capacitors have a large voltage coefficient, so the actual capacitance of the component at the desired operating voltage may be only a fraction of the specified value. also, the very low esr of ceramic capacitors may necessitate additional capacitors for acceptable stability margin. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8001. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8001 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot plugging safely section.
ltm8001 13 8001f for more information www.linear.com/8001 applications information ltm8001 table 1: recommended component values and configuration for v out0 (t a = 25c) v in0 v out0 c in0 c out0 (ceramic) c out0 (electrolytic) r fb0 f optimal r t(optimal) f max r t(min) 6v to 36v 1.2v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g open 200khz 200k 250khz 169k 6v to 36v 1.5v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 38.3k 300khz 140k 350khz 118k 6v to 36v 1.8v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 19.6k 350khz 118k 400khz 102k 6v to 36v 2.5v 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 9.09k 450khz 90.9k 525khz 78.7k 6v to 36v 3.3v 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 5.62k 550khz 75.0k 625khz 64.9k 7v to 36v 5v 10f, 50v, 1210 100f, 6.3v, 1210 120f, 16v, 27m, os-con, 16svpc120m 3.09k 600khz 68.1k 700khz 57.6k 10v to 36v 8v 10f, 50v, 1210 100f, 10v, 1210 120f, 16v, 27m, os-con, 16svpc120m 1.74k 625khz 64.9k 750khz 53.6k 15v to 36v 12v 10f, 50v, 1210 47f, 16v, 1210 120f, 16v, 27m, os-con, 16svpc120m 1.10k 650khz 61.9k 800khz 49.9k 22v to 36v 18v 10f, 50v, 1210 22f, 25v, 1210 47f, 20v, 45m, os-con, 20svps47m 715 675khz 59.0k 900khz 44.2k 28v to 36v 24v 4.7f, 50v, 1210 10f, 50v, 1206 47f, 35v, 30m, os-con, 35svpc47m 523 700khz 57.6k 1mhz 39.2k 9v to 15v 1.2v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g open 200khz 200k 525khz 78.7k 9v to 15v 1.5v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 38.3k 300khz 140k 650khz 61.9k 9v to 15v 1.8v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 19.6k 350khz 118k 800khz 49.9k 9v to 15v 2.5v 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 9.09k 450khz 90.9k 1mhz 39.2k 9v to 15v 3.3v 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 5.62k 550khz 75.0k 1mhz 39.2k 9v to 15v 5v 10f, 50v, 1210 100f, 6.3v, 1210 120f, 16v, 27m, os-con, 16svpc120m 3.09k 600khz 68.1k 1mhz 39.2k 10v to 15v 8v 10f, 50v, 1210 100f, 10v, 1210 120f, 16v, 27m, os-con, 16svpc120m 1.74k 625khz 64.9k 1mhz 39.2k 18v to 36v 1.2v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g open 200khz 200k 250khz 169k 18v to 36v 1.5v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 38.3k 300khz 140k 350khz 118k 18v to 36v 1.8v 10f, 50v, 1210 100f, 6.3v, 1210 470f, 6.3v, 9m, chemi-con, apxf6r3ara471mh80g 19.6k 350khz 118k 400khz 102k 18v to 36v 2.5v 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 9.09k 450khz 90.9k 525khz 78.7k 18v to 36v 3.3 10f, 50v, 1210 100f, 6.3v, 1210 330f, 4v, 27m, os-con, 4svpc330m 5.62k 550khz 75.0k 625khz 64.9k 18v to 36v 5v 10f, 50v, 1210 100f, 6.3v, 1210 120f, 16v, 27m, os-con, 16svpc120m 3.09k 600khz 68.1k 700khz 57.6k 18v to 36v 8v 10f, 50v, 1210 100f, 10v, 1210 120f, 16v, 27m, os-con, 16svpc120m 1.74k 625khz 64.9k 750khz 53.6k 18v to 36v 12v 10f, 50v, 1210 47f, 16v, 1210 120f, 16v, 27m, os-con, 16svpc120m 1.10k 650khz 61.9k 800khz 49.9k note: an input bulk capacitor is required.
ltm8001 14 8001f for more information www.linear.com/8001 applications information programming switching frequency the ltm8001 has an operational switching frequency range between 200khz and 1mhz. this frequency is programmed with an external resistor from the rt pin to ground. do not leave this pin open under any condition. see table 2 for resistor values and the corresponding switching frequencies. table 2. r t resistor values and their resultant switching frequencies switching frequency (mhz) r t (k) 1 39.2 0.75 53.6 0.5 82.5 0.3 140 0.2 200 switching frequency trade-offs it is recommended that the user apply the optimal r t resis- tor value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the ltm8001 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the ltm8001 in some fault conditions. a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. switching frequency synchronization the nominal switching frequency of the ltm8001 is determined by the resistor from the rt pin to gnd and may be set from 200khz to 1mhz. the internal oscillator may also be synchronized to an external clock through the sync pin. the external clock applied to the sync pin must have a logic low below 0.8v and a logic high greater than 1.2v. the input frequency must be 20% higher than the frequency determined by the resistor at the rt pin. the sync pin must be tied to gnd if the synchroniza - tion to an external clock is not required. when sync is grounded, the switching frequency is determined by the resistor at the rt pin. soft-start the soft-start function controls the slew rate of the power supply output v out0 voltage during start-up. a controlled output voltage ramp minimizes output voltage overshoot, reduces inrush current from the v in0 supply, and facili - tates supply sequencing. a capacitor connected from the ss pin to gnd programs the slew rate. the capacitor is charged from an internal 11a current source to produce a ramped output voltage. maximum output current adjust the ltm8001 features an adjustable accurate current limit. to adjust the load current limit, an analog voltage is applied to the ilim pin. varying the voltage between 0v and 1.5v adjusts the maximum current between the minimum and the maximum current, 5.6a typical. above 1.5v, the control voltage has no effect on the regulated inductor current. graphs of the output current vs ilim volt - ages are given in the typical performance characteristics section. the ltm8001 provides a 2v reference voltage for conveniently applying resistive dividers to set the current limit. the current limit can be set as shown in figure 1 with the following equation: i max = 7.47 r2 r1 + r2 a convenient value of r1 may be 10k. in that case, r2 = 10 ? i max 7.47 ?i max k ? ltm8001 v ref r1 2v r2 8001 f01 ilim figure 1. setting the output current limit, i max
ltm8001 15 8001f for more information www.linear.com/8001 load current derating using the ilim pin in high current applications, derating the maximum current based on operating temperature may prevent damage to the load. in addition, many applications have thermal limitations that will require the regulated current to be reduced based on the load and/or board tempera - ture. to achieve this, the ltm8001 uses the ilim pin to reduce the effective regulated current in the load. while ilim programs the regulated current in the load, it may also be configured to reduce the regulated current. the load/board temperature derating is programmed using a resistor divider with a temperature dependant resistance, as shown in figure 2. when the board/load temperature rises, the ilim voltage will decrease. thermal shutdown if the part is too hot, the ltm8001 engages its thermal shutdown, terminates switching and discharges the soft- start capacitor. when the part has cooled, the part automati - cally restarts. this thermal shutdown is set to engage at temperatures above the 125c absolute maximum internal operating rating to ensure that it does not interfere with functionality in the specified operating range. this means that internal temperatures will exceed the 125c absolute maximum rating when the overtemperature protection is active, possibly impairing the devices reliability. uvlo and shutdown the ltm8001 v out0 step-down regulator has an internal uvlo that terminates switching, resets all logic, and dis - charges the soft-start capacitor for input voltages below 4.2v. the ltm8001 also has a precision run function that enables switching when the voltage at the run pin rises to 1.68v and shuts down the ltm8001 when the run pin voltage falls to 1.55v. there is also an internal current source that provides 5.5a of pull-down current to program additional uvlo hysteresis. for run rising, the current source is sinking 5.5a until run = 1.68v, after which it turns off. for run falling, the current source is off until the run = 1.55v, after which it sinks 5.5a. the following equations determine the voltage divider resis - tors for programming the falling uvlo voltage and rising enable voltage (v ena ) as configured in figure 4. r2 = v ena ? 1.084 uvlo 5.5a r1 = 1.55 r2 uvlo ? 1.55 applications information ltm8001 v ref r ntc r x r v r v r2 r1 (option a to d) 8001 f02 ilim b r ntc a r ntc r x d r ntc c figure 2. load current derating vs temperature using an ntc resistor v out0 output overvoltage protection the ltm8001 switching regulator uses the fb0 pin to both regulate the output voltage and to provide a high speed overvoltage lockout to avoid high voltage output condi - tions. if the output voltage exceeds 125% of the regulated voltage level (1.5v at the fb0 pin), the ltm8001 terminates switching and shuts down switching for a brief period. the output voltage at which output overvoltage protection en - gages must be greater than 1.5v and is set by the equation: v out = 1.5v 1 + 10k r fb0 ? ? ? ? ? ? where r fb0 is shown in figure 3. if the output overvoltage protection engages, the ltm8001 will stop switching. if this is due to some external power source connected to v out0 , this source will be free to pull up v out0 . if the v out0 voltage exceeds the v in0 input, an internal power diode will clamp the output to a diode drop above the input. ltm8001 v out v out r fb0 8001 f03 fb0 figure 3. voltage regulation and overvoltage protection feedback connections
ltm8001 16 8001f for more information www.linear.com/8001 the run pin has an absolute maximum voltage of 6v. to accommodate the largest range of applications, there is an internal zener diode that clamps this pin, so that it can be pulled up to a voltage higher than 6v through a resistor that limits the current to less than 100a. for applications where the supply range is greater than 4:1, size r2 greater than 375k. input precautions the ltm8001 contains a step-down switching regulator that operates at a user-selectable frequency in forced continuous mode. step-down switching regulators that operate in forced continuous mode are capable of both sinking and sourcing current to maintain output voltage regulation when the ltm8001 is sinking current, it maintains its output voltage regulation by power conversion, not power dissipation. this means that the energy provided to the ltm8001 is in turn delivered to its input power bus. there must be something on this power bus to accept or use the energy, or the ltm8001s input voltage will rise. left unchecked, the energy can raise the input voltage above the absolute maximum voltage rating and damage the ltm8001. in many cases, the system load on the ltm8001 input bus will be sufficient to absorb the energy delivered by the module regulator. the power required by other devices will consume more than enough to make up for what the ltm8001 delivers. in cases where the ltm8001 is the largest or only power converter, this may not be true and some means may need to be devised to prevent the ltm8001s input from rising too high. figure 5a shows a passive crowbar circuit that will dissipate energy during momentary input overvoltage conditions. the breakdown voltage of the zener diode is chosen in conjunction with the resistor r to set the circuits trip point. the trip point is typically set well above the maximum v in voltage under normal operating conditions. this circuit does not have a precision threshold, and is subject to both part-to-part and temperature variations, so it is not suitable for applications where high accuracy is required or large voltage margins are not available. the circuit in figure 5b also dissipates energy during mo - mentary overvoltage conditions, but is more precise than that in figure 5a. it uses an inexpensive comparator and the v ref output of the ltm8001 to establish a reference voltage. the optional hysteresis resistor in the comparator circuit avoids mosfet chatter. figure 5c shows a circuit that latches on and crowbars the input in an overvoltage applications information load sharing the v out0 step-down switching converter operates in fixed frequency forced continuous mode, so it is able to source and sink current. it is therefore not suitable for load current sharing. the linear regulators connected to v out1 -v out5 are inter - nally ballasted and may be paralleled. to do this, simply tie the v outx and setx terminals together. when the set pins of the regulators are tied together, the r set resistor is determined by the equation: r set = v out n ? 10a where n is the number of linear regulator outputs tied together. all paralleled ldos must be active in order for this equa - tion to be true, as it is assumed that all paralleled ldos are contributing 10a to a single voltage set resistor. if any ldo is off or inactive, it will be unable to contribution its share of the set current and the output voltage will be lower than expected. when paralleling ldos, tie all of the v outx and all of the setx pins together. examples are shown in the typical applications section. ltm8001 v in r2 v in r1 8001 f04 run figure 4. uvlo configuration
ltm8001 17 8001f for more information www.linear.com/8001 event. the scr latches when the input voltage threshold is exceeded, so this circuit should be used with a fuse, as shown, or employ some other method to interrupt current from the load. as mentioned, the ltm8001 sinks current by energy conversion and not dissipation. thus, no matter what protection circuit that is used, the amount of power that the protection circuit must absorb depends upon the amount of power at the input. for example, if the output voltage is 2.5v and can sink 5a, the input protection circuit should be designed to absorb at least 7.5w. in figures 5a and 5b, let us say that the protection activation threshold is 30v. then the circuit must be designed to be able to dissipate 7.5w and accept 7.5w/30v = 250ma. figures 5a through 5c are crowbar circuits, which attempt to prevent the input voltage from rising above some level by clamping the input to gnd through a power device. in some cases, it is possible to simply turn off the ltm8001 when the input voltage exceeds some threshold. this is possible when the voltage power source that drives current into v out never exceeds v in . an example of this circuit is shown in figure 5d. when the power source on the output drives v in above a predetermined threshold, the comparator pulls down on the run pin and stops switching in the ltm8001. when this happens, the input capacitance needs to absorb the energy stored within the ltm8001s internal inductor, resulting in an additional voltage rise. as shown in the block diagram, the internal applications information v in zener diode r q 8001 f05a ltm8001 load current gnd v out0 sourcing load v in v ref 8001 f05b q ltm8001 load current gnd v out0 sourcing load optional hysteresis resistor + ? v in zener diode scr 8001 f05a ltm8001 load current gnd v out0 fuse sourcing load v in run 8001 f05d 10f ltm8001 load current gnd v out0 sourcing load external reference voltage + ? figure 5a. the mosfet q dissipates momentary energy to gnd. the zener diode and resistor are chosen to ensure that the mosfet turns on above the maximum v in voltage under normal operation figure 5b. the comparator in this circuit activates the q mosfet at a more precise voltage than the one shown in figure 5a. the reference for the comparator is derived from the v ref pin of the ltm8001 figure 5c. the scr latches on when the activation threshold is reached, so a fuse or some other method of disconnecting the load should be used figure 5d. this comparator circuit turns off the ltm8001 if the input rises above a predetermined threshold. when the ltm8001 turns off, the energy stored in the internal inductor will raise v in a small amount above the threshold.
ltm8001 18 8001f for more information www.linear.com/8001 inductor value is 2.2uh. if the ltm8001 negative current limit is set to 5a, for example, the energy that the input capacitance must absorb is 1/2 li 2 = 27.5j. suppose the comparator circuit in figure 5d is set to pull the run pin down when v trip = 15v. the input voltage will rise according to the capacitor energy equation: 1 2 c v in 2 ? v trip 2 ( ) = 27.5j if the total input capacitance is 10f, the input voltage will rise to: 27.5j = 1 2 10f v in 2 ? 15v 2 ( ) v in = 15.2v pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8001. the ltm8001 is neverthe - less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 6 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r setx , r fb0 and r t resistors as close as pos - sible to their respective pins. 2. place the c in0 capacitor as close as possible to the v in0 and gnd connection of the ltm8001. 3. place the ceramic c out0 capacitor as close as possible to the v out0 and gnd connection of the ltm8001. the electrolytic c out0 capacitor may be farther from the ltm8001. place the remaining c outx output capacitors as close as possible to the v outx pins. 4. place the c in0 and c out0 capacitors such that their ground currents flow directly adjacent or underneath the ltm8001. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8001. 6. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 6. the ltm8001 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. applications information figure 6. layout showing suggested external components, gnd plane and thermal vias hot plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8001. however, these capacitors can cause problems if the ltm8001 is plugged into a live input supply (see application note 88 for a complete dis - cussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the v in0 pin of the ltm8001 can ring to more than twice the nominal input voltage, possibly exceeding the ltm8001s rating v out1 v in0 v ref sync rt comp fbo ss run i lim v out2 v out3 v out4 v out5 v in45 v out0 c out0 c out5 gnd 8001 f06 gnd c in0 thermal vias set5 set4 set3 set2 set1 bias45 bias123 c out1 c out2 c out3 c out4 gnd gnd
ltm8001 19 8001f for more information www.linear.com/8001 and damaging the part. if the input supply is poorly con - trolled or the user will be plugging the ltm8001 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in0 , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in0 net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the performance of the circuit, though it may be physically large. shorted input protection care needs to be taken in systems where the v out0 out- put will be held high when the input to the ltm8001 is absent. if the v in0 is allowed to float and the run pin is held high (either by a logic signal or because it is tied to v in0 ), then the ltm8001s internal circuitry will pull its quiescent current through its internal power switch. this is fine if your system can tolerate this state. if the run pin is pulled low, the input current will drop to essentially zero. however, if the v in0 is grounded while the v out0 output is held high, then parasitic diodes inside the ltm8001 can pull large currents from the output through the v in0 pin. figure 7 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. charging applications the ltm8001s internal switching step-down regula - tors cvcc operation makes it well suited for battery or supercapacitor charging applications. a schematic of the ltm8001 charging a supercapacitor and then distribut - ing power to various loads through the onboard ldos is shown in the typical applications section. in this applica - tion, the supercapacitor is charged through the step-down switching regulator and not the ldos. each ldo is rated for positive and differential voltages between its input and output, but may experience a negative voltage during start-up or turn-off transients if its output is connected to a battery, supercapacitor or energized load. avoid using the ltm8001 in applications where the internal ldos can experience a negative voltage. thermal considerations the ltm8001 output current may need to be derated if it is required to operate in a high ambient temperature. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance characteristics section can be used as a guide. these curves were generated by the ltm8001 mounted to a 59cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. for increased accuracy and fidelity to the actual application, many designers use finite element analysis (fea) to predict thermal performance. to that end, the pin configuration of this data sheet typically gives four thermal coefficients: ja : thermal resistance from junction to ambient jcbottom : thermal resistance from junction to the bottom of the product case applications information v in run rt v out0 gnd 8001 f07 ltm8001 v in v out figure 7. the input diode prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the ltm8001 runs only when the input is present
ltm8001 20 8001f for more information www.linear.com/8001 jctop : thermal resistance from junction to top of the product case jb : thermal resistance from junction to the printed circuit board while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased below: ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi - ronment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module regulator and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module regulator. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in this products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a graphical representation of these thermal resistances is figure 8. the blue resistances are contained within the module regulator, and the green are outside. the die temperature of the ltm8001 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8001. the bulk of the heat flow out of the ltm8001 is through the bottom of the module and the bga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, result - ing in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. applications information
ltm8001 21 8001f for more information www.linear.com/8001 applications information 8001 f08 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction a t case (bottom)-to-board resistance figure 8. thermal resistances among module device printed circuit board and ambient environment
ltm8001 22 8001f for more information www.linear.com/8001 typical applications five output dc/dc module regulator 68.1k 600khz + v out5 set5 ldo 5 fbo step-down switching regulator v out4 set4 ldo 4 v out3 set3 comp ss v ref ilim sync ldo 3 953 1.21m 2.2f rt gnd v in45 bias123 bias45 510k 10f v out2 set2 ldo 2 v out1 set1 12v1 300ma 12v2 300ma 47f 120f 12v3 300ma 12v4 300ma 12v5 300ma v in0 run v in 18v to 36v v out0 (13.5v) ltm8001 ldo 1 1.21m 2.2f 1.21m 2.2f 1.21m 2.2f 1.21m 8001 ta02 2.2f
ltm8001 23 8001f for more information www.linear.com/8001 typical applications dual input, 2.5v 5a dc/dc module converter using a single ltm8001 (external 3.3v turns on before or simultaneously with 12v) 82.5k v out5 set5 ldo 5 fbo 500khz step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 6.65k rt gnd 10f 10f v in45 510k v out2 set2 ldo 2 v out1 set1 2.5v 5a 3v v in0 run v in 12v external 3.3v v out0 ltm8001 ldo 1 22f 10nf 49.9k 470f 8001 ta03 100f +
ltm8001 24 8001f for more information www.linear.com/8001 typical applications supercapacitor charger and two output regulator 68.1k 3.09k v out5 set5 ldo 5 fbo 600khz step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 rt gnd 10f v in45 200k 48.7k v out2 set2 ldo 2 v out1 set1 2.5v 0.5a 3.3v 1a 5v v in0 run v in 9v to 15v v out0 ltm8001 ldo 1 4.7f 124k 10f 110k 47f 8001 ta04 1.5f 5v supercap pm-5rov155-r
ltm8001 25 8001f for more information www.linear.com/8001 use two ltm8001s to implement a 2.5v out 10a dc/dc module converter typical applications 82.5k v out5 set5 ldo 5 fbo 500khz 500khz step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 6.65k rt gnd 10f 2 v in45 510k v out2 set2 ldo 2 v out1 set1 3v v in0 run v in1 12v v out0 ltm8001 ldo 1 22f 24.9k 100f 8001 ta05 470f 2.5v 10a + 82.5k v out5 set5 ldo 5 fbo step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 6.65k rt gnd v in45 v out2 set2 ldo 2 v out1 set1 3v v in0 run v out0 ltm8001 ldo 1 100f 470f +
ltm8001 26 8001f for more information www.linear.com/8001 package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes l k j h g f e d c b a 123 891011 4567 pin 1 bga package 121-lead (15.00mm 15.00mm 3.42mm) (reference ltc dwg# 05-08-1923 rev ?) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 6. solder ball composition can be 96.5% sn/3.0% ag/0.5% cu or sn pb eutectic 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (121 places) detail b substrate a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 3.22 0.50 2.72 0.60 0.60 0.27 2.45 nom 3.42 0.60 2.82 0.75 0.63 15.00 15.00 1.27 12.70 12.70 0.32 2.50 max 3.62 0.70 2.92 0.90 0.66 0.37 2.55 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 121 a2 d e e b f g suggested pcb layout top view 0.000 3.810 5.080 3.810 6.350 5.080 6.350 2.540 1.270 2.540 1.270 6.350 5.080 1.270 6.350 5.080 3.810 2.540 1.270 0.3175 0.3175 3.810 2.540 0.000 // bbb z z h2 h1 0.635 0.025 ? 121x ltmxxxxxx module bga 121 0512 rev ? tray pin 1 bevel package in tray loading orientation component pin ?a1?
ltm8001 27 8001f for more information www.linear.com/8001 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description package photo table 3. ltm8001 pinout (sorted by pin number) pin name pin name pin name pin name pin name pin name a1 gnd b1 gnd c1 gnd d1 gnd e1 gnd f1 gnd a2 gnd b2 gnd c2 gnd d2 gnd e2 gnd f2 gnd a3 v out0 b3 v out0 c3 v out0 d3 gnd e3 gnd f3 gnd a4 v out0 b4 v out0 c4 v out0 d4 gnd e4 gnd f4 gnd a5 v out0 b5 v out0 c5 v out0 d5 gnd e5 gnd f5 gnd a6 v in45 b6 v in45 c6 v in45 d6 gnd e6 gnd f6 gnd a7 v in45 b7 v in45 c7 v in45 d7 gnd e7 gnd f7 gnd a8 bias45 b8 bias123 c8 gnd d8 gnd e8 gnd f8 gnd a9 set5 b9 gnd c9 gnd d9 gnd e9 gnd f9 gnd a10 v out5 b10 gnd c10 gnd d10 gnd e10 gnd f10 gnd a11 v out5 b11 v out4 c11 v out4 d11 set4 e11 v out3 f11 v out3 pin name pin name pin name pin name pin name g1 gnd h1 gnd j1 v in0 k1 v in0 l1 v in0 g2 gnd h2 gnd j2 v in0 k2 v in0 l2 v in0 g3 gnd h3 gnd j3 v in0 k3 v in0 l3 v in0 g4 gnd h4 gnd j4 gnd k4 ss l4 run g5 gnd h5 gnd j5 gnd k5 gnd l5 fb0 g6 gnd h6 gnd j6 gnd k6 gnd l6 comp g7 gnd h7 gnd j7 gnd k7 sync l7 rt g8 gnd h8 gnd j8 gnd k8 v ref l8 ilim g9 gnd h9 gnd j9 gnd k9 gnd l9 set1 g10 gnd h10 gnd j10 gnd k10 gnd l10 v out1 g11 set3 h11 set2 j11 v out2 k11 v out2 l11 v out1
ltm8001 28 8001f for more information www.linear.com/8001 ? linear technology corporation 2013 lt 0213 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/8001 related parts typical application three output dc/dc module converter 118k v out5 set5 ldo 5 fbo 350khz step-down switching regulator v out4 set4 ldo 4 v out3 set3 bias123 bias45 comp ss v ref ilim sync ldo 3 19.6k rt gnd 10f 10k 20.5k v in45 510k v out2 set2 ldo 2 v out1 set1 1v 2.2a 1.2v 1.3a 1.8v 1a v in0 run v in 9v to 18v v out0 ltm8001 ldo 1 60.4k 4.7f 10f 33.2k 470f 8001 ta06 100f + part number description comments ltm8026 36v in , 5a step-down module regulator with adjustable current limit 6v v in 36v, 1.2v v out 24v, adjustable current limit, parallelable outputs, clk input, 11.25mm 15mm 2.82mm lga ltm8052 36v in , 5a step-down module regulator with adjustable current limit 6v v in 36v, 1.2v v out 24v, C5v i out 5a, adjustable current limit, clk input, 11.25mm 15mm 2.82mm lga, pin compatible with ltm8026 ltm8061 32v, 2a step-down module battery charger with programmable input current limit suitable for cc-cv charging single and dual cell li-ion or li-poly batteries, 4.95v v in 32v, c/10 or adjustable timer charge termination, ntc resistor monitor input, 9mm 15mm 4.32mm lga ltm8062a 32v, 2a step-down module battery charger with integrated maximum peak power tracking (mppt) for solar applications suitable for cc-cv charging method battery chemistries (li-ion, li-poly, lead-acid, lifepo 4 ), user adjustable mppt servo voltage, 4.95v v in 32v, 3.3v v batt 18.8v adjustable, c/10 or adjustable timer charge termination, ntc resistor monitor input, 9mm 15mm 4.32mm lga ltm8033 36v, 3a en55022 class b certified dc/dc step-down module regulator 3.6v v in 36v, 0.8v v out 24v, synchronizable, 11.25mm 15mm 4.32mm lga ltm4613 36v in , 8a en55022 class b certified dc/dc step- down module regulator 5v v in 36v, 3.3v v out 15v, pll input, v out tracking and margining, 15mm 15mm 4.32mm lga ltm8048 1.5w, 725vdc galvanically isolated module converter with ldo post regulator 3.1v v in 32v, 2.5v v out 12v, 1mv p-p output ripple, internal isolated transformer, 9mm 11.25mm 4.92mm bga ltc2978 octal digital power supply manager with eeprom i 2 c/pmbus interface, configuration eeprom, fault logging, 16-bit adc with 0.25% tue, 3.3v to 15v operation LTC2974 quad digital power supply manager with eeprom i 2 c/pmbus interface, configuration eeprom, fault logging, per channel voltage, current and temperature measurements ltc3880 dual output polyphase ? step-down dc/dc controller with digital power system management i 2 c/pmbus interface, configuration eeprom, fault logging, 0.5% output voltage accuracy, mosfet gate drivers

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